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1 features ? 12 parallel channels, to tal 32.6 gbps capacity ? data rate up to 2.72 gbps per channel ? 850 nm vcsel array ? data i/o is cml compatib le with dc blocking capacitors ? link reach 300 m with 50/125 m 500 mhz . km fiber at 2.5 gbps ? channel ber better than 10 -12 ? industry standard mpo/mtp ? ribbon fiber connector interface ? pluggable megarray ? ball grid array connector ? optionally available with emi shield and external heat sink ? laser class 1m iec 60825-1:2001 compliant ? power supply 3.3 v ? compatible with industry msa applications ? high-speed interconnects within and between switches, routers and transport equipment ? proprietary backplanes ? low cost sonet/sdh vsr (very short reach) oc-192/stm64 connections ? infiniband ? connections ? interconnects rack-to-rack, shelf-to-shelf, board- to-board, board-to-optical backplane description the zl60101 and zl60102 together make a very high speed transmitter/receiver pair for parallel fiber applications. the transmitter module converts parallel electrical input signals via a laser driver and a vcsel array into parallel optical output signals at a wavelength of 850nm. the receiver module converts parallel optical input signals via a pin photodiode array and a transimpedance and limiting amplifier into electrical output signals. the modules are pluggable each fitted with an industry- standard megarray ? bga connector. this provides ease of assembly on the host board and enables provisioning of bandwidth on demand. issue 1.0 november 2002 ordering information zl60101/mjd parallel fiber transmitter zl60102/mjd parallel fiber receiver options zl6010*/mkd module with emi shield zl6010*/mld module with external heat sink zl6010*/mmd module with external heat sink and emi shield zl60101 tx / zl60102 rx 12 x 2.7 gbps para llel fiber optic link transmitter and receiver data sheet
data sheet zl60101 tx / zl60102 rx 2 zarlink semiconductor inc. table of contents features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 transmitter specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 transmitter control and status signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 transmitter control and status timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 transmitter pinout assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 transmitter pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 receiver specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 receiver control and status signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 receiver control and status timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 receiver pinout assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 receiver pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 circuit board footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 heading frontplate for panel accessed module s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 regulatory compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 eye safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 electrostatic discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 electrostatic discharge immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 electromagnetic interference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 handling instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 cleaning the optical interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 esd handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 link reach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 link model parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 electrical interface - application examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
data sheet zl60101 tx / zl60102 rx 3 zarlink semiconductor inc. absolute maximum ratings not necessarily applied together. exceeding these valu es may cause permanent damage. functional operation under these conditions is not implied. recommended operating conditions these parameters apply both to the transmitter and the receiver. figure 1 - recommended power supply filter table 1 - absolute maximum ratings parameter symbol min max unit supply voltage v cc -0.3 4.0 v differential input voltage amplitude 1 1. differential input voltage amplitude is defined as ? v = ? din+ ? din- ?. ? v1.2v voltage on any pin v pin -0.3 v cc + 0.3 v relative humidity (non-condensing) m os 595% storage temperature t stg -40 100 c esd resistance v esd 1 kv table 2 - recommended operating conditions parameter symbol min max unit power supply voltage v cc 3.135 3.465 v operating case temperature t case 080 c signaling rate (per channel) 1 1. data patterns are to have maximum run lengths and dc balance shifts no worse than that of a pseudo random bit sequence of length 2 23 -1 (prbs-23). information on lower bit rates is available on request. f d 1.0 2.72 gbps link distance 2 2. for maximum distance, see table 19. ld 2 m data i/o dc blocking capacitors 3 3. for ac-coupling, dc blocking capacitors external to the module with a minimum value of 100 nf is recommended. c blk 100 nf power supply noise 4 4. power supply noise is defined at the supp ly side of the recommended filter for all v cc supplies over the frequency range of 500 hz to 2720 mhz with the recommended power supply filter in place. v nps 200 mv p-p host vcc r1 100 ? c1 10 f c2 10 f l1 1 h r2 1.0 k ? c3 0.1 f c4 0.1 f l2 6.8 nh module vcc
zl60101 tx / zl60102 rx data sheet 4 zarlink semiconductor inc. transmitter specifications all parameters below require operating conditions according to table 2. table 3 - transmitter optical and electrical specifications parameter symbol min max unit optical parameters launch power (50/125 m mmf) 1 1. the output optical power is compli ant with iec 60825-1 amendment 2, class 1m accessible emission limits. p out -7.5 -2 dbm extinguished output power p off -30 dbm extinction ratio 2 2. the extinction ratio is measured at 622 mbps. er 7 db optical modulation amplitude 3 3. informative. corresponds to p out = -7.5 dbm and er = 7 db. oma 0.24 mw center wavelength c 830 860 nm spectral width 4 4. spectral width is measured as defined in eia/tia-455-127 spectral characterization of multimode laser diodes . ? 0.85 nm rms relative intensity noise oma rin 12 oma -116 db/hz optical output rise time (20 - 80%) t ro 150 ps optical output fall time (20 - 80%) t fo 150 ps total jitter contributed (peak to peak) 5 5. total jitter equals tp1 to tp2 as defined in i eee 802.3 clauses 38.2 and 38.6 (gigabit ethernet). tj 120 ps deterministic jitter contributed (peak to peak) dj 50 ps channel to channel skew 6 6. channel skew is defined for the condit ion of equal amplitude, zero ps skew signals applied to the transmitter inputs. t sk 100 ps electrical parameters power dissipation p d 1.5 w supply current i cc 450 ma differential input voltage amplitude (peak to peak) 7 7. differential input voltage is defined as the peak to peak value of the differentia l voltage between din+ and din-. data inpu ts are cml compatible. ? v in 200 1600 mv p-p differential input impedance 8 8. differential input impedance is measured between din+ and din-. z in 80 120 ? electrical input rise time (20 - 80%) t re 160 ps electrical input fall time (20 - 80%) t fe 160 ps
data sheet zl60101 tx / zl60102 rx 5 zarlink semiconductor inc. figure 2 - transmitter block diagram figure 3 - differential cml input equivalent circuit table 4 - transmitter optical channel assignment front view - mtp key up ch 11 ch 10 ch 9 ch 8 ch 7 ch 6 ch 5 ch 4 ch 3 ch 2 ch 1 ch 0 host circuit board vcsel driver controller vcsel driver vcsel array fault tx_en tx_dis v cc v ee reset din0+ din0- din11+ din11- 0 1 2 3 4 5 6 7 8 9 10 11 50? 50? 13k ? 11k ? v ee v cc din+ din-
zl60101 tx / zl60102 rx data sheet 6 zarlink semiconductor inc. transmitter control and status signals the following table shows the timing relationships of th e status and control signals of the pluggable optical transmitter. table 5 - transmitter control and status signals parameter symbol min typ max unit control input voltage high 1 1. applies to control signals reset , tx_dis and tx_en. v ih 2.1 v control input voltage low v il 0.62 v control pull-up resistor 2 2. applies to control signals reset and tx_en. internal pull-up resistor. r pu1 10 k ? control pull-down resistor 3 3. applies to control signal tx_d is. internal pull-down resistor. r pd 10 k ? status output voltage low 4, 5 4. applies to status signal fault . internal pull-up to v cc . 5. with status output si nk current max. 2 ma. v ol 0.4 v status pull-up resistor 4 r pu2 20 100 k ? fault assert time t fa 100 s fault lasers off t fd 100 s reset duration t tdd 10 s reset assert time t off 510 s reset de-assert time t on 100 ms tx_en assert time t ten 1ms tx_en de-assert time t td 510 s tx_dis assert time t td 510 s tx_dis de-assert time t ten 1ms
data sheet zl60101 tx / zl60102 rx 7 zarlink semiconductor inc. transmitter control and status timing diagrams the following figures show the timing relationships of the status and control signals of the pluggable optical transmitter. figure 4 - transmitter power-up sequence figure 5 - transmitter fault signal timing diagram reset: floating or high transmitter not ready normal operation vcc t ten tx output [0:11] data [0:11] no fault fault fault t fa t fd tx output [0:11] data [0:11]
zl60101 tx / zl60102 rx data sheet 8 zarlink semiconductor inc. figure 6 - transmitter reset signal timing diagram figure 7 - transmitter enable and disable timing diagram table 6 - truth table for transmitte r operation (pre-condition: reset floating or high) tx_dis high tx_dis low tx_en high transmitter disabled normal operation tx_en low transmitter disabled transmitter disabled transmitter not ready normal operation fault t on tx output [0:11] data [0:11] reset t tdd tx_en data [0:11] lasers off t td normal operation tx off tx_dis lasers off data [0:11] t td normal operation tx off data [0:11] tx_en t ten normal operation transmitter not ready
data sheet zl60101 tx / zl60102 rx 9 zarlink semiconductor inc. transmitter pinout assignments (10x10 array, 1.27 mm pitch) transmitter pin description table 7 - transmitter host circuit board layout (top view, toward mpo/mtp ? connector end) kjhgfedcba 1 nicnicnicv ee v ee v ee v ee v ee v ee nic 2 nicnicnicv ee v ee din5+ v ee v ee din8+ v ee 3 nic v cc v cc v ee din4+ din5- v ee din7+ din8- v ee 4 nic v cc v cc din3+ din4- v ee din6+ din7- v ee nic 5 nic v cc v cc din3- v ee din2+ din6- v ee din9- v ee 6 nic v cc v cc v ee din1+ din2- v ee din10- din9+ v ee 7 nic nic nic din0+ din1- v ee din11- din10+ v ee nic 8 dnc reset fault din0- v ee v ee din11+ v ee v ee nic 9 dnc tx_en tx_dis v ee v ee v ee v ee v ee v ee nic 10 dnc dnc dnc dnc dnc dnc dnc dnc dnc dnc table 8 - transmitter pin descriptions signal name type description comments din[0:11] +/- data input transmitter data in, channel 0 to 11 internal differential termination at 100 ?. v cc transmitter power supply rail v ee transmitter signal common. all transmitter voltages are referenced to this potential unless otherwise stated. directly connect these pads to the pc board transmitter signal ground plane. tx_en control input transmitter enable. high: normal operation low: disable transmitter active high, internal pull-up. see table 6. tx_dis control input transmitter disable. high: disable transmitter low: normal operation active high, internal pull-down. see table 6. fault status output transmitter fault. high: normal operation low: laser fault detected on at least one channel when active, all channels are disabled. clear by reset signal. internal pull-up. reset control input transmitter reset. high: normal operation low:reset to clear fault signal internal pull-up. dnc do not connect to any potential, including ground. nic no internal connection.
zl60101 tx / zl60102 rx data sheet 10 zarlink semiconductor inc. receiver specifications all parameters below require operating conditions according to table 2 and a termination load of 100 ? differential at the electrical output. table 9 - receiver optical and electrical parameters parameter symbol min max unit optical parameters input optical power 1 1. receive power for a channel is measured for a ber of 10 -12 and worst case extinction ratio. p in (min) is measured using a fast rise/fall time source with low rin and adjacent channel(s) operating with with incident power of 6 db above p in (min). p in -16 -2 dbm center wavelength c 830 860 nm return loss 2 2. return loss is measured as defined in tia/eia-455-107a determination of component reflectance or link/system return loss us- ing a loss test set. rl 12 db total jitter contributed (peak to peak) 3 3. total jitter equals tp3 to tp4 as defined in i eee 802.3 clauses 38.2 and 38.6 (gigabit ethernet). tj 120 ps deterministic jitter contributed (peak to peak) dj 50 ps stressed receiver sensitivity 4 4. the stressed receiver sensitivity is measured using prbs 2 23 -1 pattern, 2.7 db inter-symbol interference, isi (min), 30 ps duty cycle dependent deterministic jitter, dcd dj (min), and 7 db extinction ratio, er (min) (er penalty = 1.76 db). all channels not unde r test are receiving signals with an average input power of 6 db above p in (min). p ss -11.3 dbm channel to channel skew 5 5. channel skew is defined for the condition of equal amplit ude, zero ps skew signals applied to the receiver inputs. t sk 100 ps signal detect assert p sa -17 dbm signal detect de-assert p sd -27 dbm electrical parameters power dissipation p d 1.5 w supply current i cc 450 ma differential output voltage amplitude (peak to peak) 6 6. differential output voltage is defined as the peak to peak value of the differential voltage between dout+ and dout- and mea sured with a 100 ? differential load connected between dout+ and dout-. data outputs are cml compatible. ? v out 500 800 mv p-p output differential load impedance 7 7. see figure 19. z l 80 120 ? stressed receiver eye opening 8 8. the stressed receiver eye opening represents the eye at tp4 as defined in ieee 802.3 clauses 38.2 and 38.6 (gigabit ethernet ). the stressed receiver eye opening is measured using prbs 2 23 -1 pattern, 2.7 db isi min, 30 ps dcd dj min, 7 db er min and an average input power of -10.8 dbm (0.5 db above minimum stressed receiver sensitivity as defined in ieee 802.3 clause 38.6). all chan- nels not under test are receiving signals with an average input power of 6 db above p in (min). p se 0.3 ui electrical output rise time (20 - 80 %) t re 150 ps electrical output fall time (20 - 80 %) t fe 150 ps
data sheet zl60101 tx / zl60102 rx 11 zarlink semiconductor inc. figure 8 - receiver block diagram receiver control and status signals the following table shows the timing relationships of the status and control signals of the pluggable optical receiver. table 10 - receiver optical channel assignment front view - mtp key up ch 11 ch 10 ch 9 ch 8 ch 7 ch 6 ch 5 ch 4 ch 3 ch 2 ch 1 ch 0 host circuit board table 11 - receiver control and status signals parameter symbol min typ max unit control input voltage high 1 1. applies to control signals rx_en, sq_en. v ih 2.0 v control input voltage low 1 v il 0.9 v control input pull-up current 1 ? i in ? 10 100 a status output voltage low 2, 3 2. applies to status signal rx_sd. internal pull-up to v cc . 3. with status output sink current max 2 ma. v ol 0.4 v status output pull-up resistor 2 r pu 3.25 k ? receiver signal detect assert time t sd 50 200 s receiver signal detect de-assert time t los 50 200 s receiver enable assert time t rxen 33 ms receiver enable de-assert time t rxd 5 s pin array dout0+ dout0- v cc v ee trans- impedance and limiting amplifier sq_en rx_en rx_sd 0 1 2 3 4 5 6 7 8 9 10 11 dout11+ dout11-
zl60101 tx / zl60102 rx data sheet 12 zarlink semiconductor inc. receiver control and status timing diagrams the following figures show the timing relationships of the status and control signals of the pluggable optical receiver. figure 9 - receiver enable signal timing diagram figure 10 - receiver signal detect timing diagram normal operation rx off rx_en t rxd i cc signal no signal rx_sd t los
data sheet zl60101 tx / zl60102 rx 13 zarlink semiconductor inc. receiver pinout assignments (10x10 array, 1.27 mm pitch) receiver pin description table 12 - receiver pinout assignments (top view, toward mpo/mtp ? connector end) kjhgfedcba 1 dnc nic nic v ee v ee v ee v ee v ee v ee nic 2 dnc nic nic v ee v ee dout5- v ee v ee dout8- v ee 3 nic v cc v cc v ee dout4- dout5+ v ee dout7- dout8+ v ee 4 nic v cc v cc dout3- dout4+ v ee dout6- dout7+ v ee nic 5 nic v cc v cc dout3+ v ee dout2- dout6+ v ee dout9+ v ee 6 nic v cc v cc v ee dout1- dout2+ v ee dout10+ dout9- v ee 7 nic nic rx_sd dout0- dout1+ v ee dout11+ dout10- v ee nic 8 dnc nic nic dout0+ v ee v ee dout11- v ee v ee nic 9 dnc rx_en nic v ee v ee v ee v ee v ee v ee nic 10 sq_en dnc dnc dnc dnc dnc dnc dnc dnc dnc table 13 - receiver pin descriptions signal name type description comments dout[0:11] +/- data output receiver data out, channel 0 to 11. v cc receiver power supply rail. v ee receiver signal common. all receiver voltages are referenced to this potential unless otherwise stated. directly connect these pads to the pc board transmitter signal ground plane. rx_en control input receiver enable. high: normal operation low: disable receiver internal pull-up. rx_sd status output receiver si gnal detect. high: valid optical in put on all channels low: loss of signal on at least one channel internal pull-up. sq_en control input squelch enable. high: squelch function enabled. data out is squelched on any channels that have loss of signal low: squelch function disabled internal pull-up. dnc do not connect to any potential, including ground. nic no internal connection.
zl60101 tx / zl60102 rx data sheet 14 zarlink semiconductor inc. package outline tolerancing per asme y14.5m-1994. all dimensions are in millimeters. figure 11 - module layout (mjd option)
data sheet zl60101 tx / zl60102 rx 15 zarlink semiconductor inc. dimensions with reference designators ending in "2" (e.g., c2) are defined in table 17. table 14 - module dimensions (mjd option) key dimension [mm] comments a1 36.87 length of module body, less optical receptacle assembly b1 17.50 width of module body c1 14.40 width of optical receptacle assembly d1 4.30 height of bottom of optical receptacle assembly e1 12.23 height of top of optical receptacle assembly f1 7.48 length of optical receptacle assembly g1 12.50 height of top of module h1 3.26 clearance over host board at rear of module j1 0.98 height of standoff boss on front posts k1 0.76 height of front posts l1 31.75 distance from rear post to front plane, less optical receptacle assembly m1 30.23 distance from front to rear posts n1 13.72 distance between posts, side to side p1 1.145 location of bga pin a1 r1 19.43 location of bga pin a1, transmitter s1 ?3.63 diameter of rear posts t1 2-56 unc-2b thread dimension, minimum 3.50 mm deep u1 16.89 location of bga pin a1, receiver v1 ?1.30 diameter of front posts w1 ?2.50 diameter of standoff boss on front post x1 7.55 height of back of module without heat sink y1 27.64 length of external heat sink body
zl60101 tx / zl60102 rx data sheet 16 zarlink semiconductor inc. figure 12 - module layout with emi shield (mkd option) table 15 - module dimensions with emi shield (mkd option) key dimension [mm] comments min max aa1 8.27 distance from hostboard to centre of emi shield ab1 9.10 11.10 height of emi shie ld with bezel in a2 location ac1 15.50 17.50 width of emi shield with bezel in a2 location
data sheet zl60101 tx / zl60102 rx 17 zarlink semiconductor inc. figure 13 - module layout with external heat sink (mld option) table 16 - module dimensions with external heat sink (mld option) key dimension [mm] comments z1 15.19 height of top of module, including external heat sink ad1 24.00 length of external heat sink ae1 17.45 width of external heat sink
zl60101 tx / zl60102 rx data sheet 18 zarlink semiconductor inc. circuit board footprint tolerancing per asme y14.5m-1994. all dimensions are in millimeters. figure 14 - host circuit board footprint layout dimensions with reference designators ending in "1" (e.g., b1, c1) are defined in table 14. table 17 - host circuit board footprint dimensions key dimension [mm] tolerance [mm] comments a2 35.31 0.75 distance from rear post to inside surface of bezel b2 5.15 0.25 distance from rear post to rear of module keep-out area c2 ?0.58 0.05 diameter of pad in bga pattern d2 ?4.50 min diameter of keep-out pad for rear posts: two rear and one front e2 ?2.69 0.12 diameter of hole for mounting screws: two rear and one front f2 ?1.70 0.12 diameter of hole for front posts g2 ?3.30 min diameter of keep-out pad for front post
data sheet zl60101 tx / zl60102 rx 19 zarlink semiconductor inc. heading frontplate for panel accessed modules tolerancing per asme y14.5m-1994. all dimensions are in millimeters. figure 15 - host frontplate layout dimensions with reference designators ending in "2" (e.g., a2) are defined in table 17. table 18 - host frontplate dimensions key dimension [mm] tolerance [mm] comments a3 18.42 min centre-to-centre spacing for adjacent modules b3 16.50 0.20 width of opening in frontplate c3 0.50 max corner radius of opening in frontplate d3 3.20 0.20 height from host pcb to bottom of fron tplate opening e3 13.33 0.20 height from host pcb to top of frontplate opening
zl60101 tx / zl60102 rx data sheet 20 zarlink semiconductor inc. thermal characteristics there are three options for heat sinks depending on the cooling needs. they are 1. direct application without an y attached external heat sink 2. use the generic heat sink specified in this data sheet 3. use a customer designed external heat sink in figure 16 and figure 17, the temperature rise and thermal resistance as a function of air velocity (free air velocity at the top of the module) is shown for option 1 and 2. the thermal resistance is defined as the temperature difference between the case temperature and ambient flowin g air divided by the total heat dissipation of the module. improved thermal properties can be achieved by using a la rger heat sink especially if more height is available (option 3). for this option, a more detailed discussion with zarlink is recommended regarding heat sink design attachment materials. figure 16 - temperature difference between ambi ent flowing air and case at a heat dissipation of 1.5 w figure 17 - thermal resistance, as a function of air vel ocity (the airflow is along the shortest side of the module). for any other orientation, the thermal resistance is 75-100% of the values shown above temperature rise at 1.5w (free stream air velocity) 0 4 8 12 16 20 01234 air velocity (m/s) temperature rise (k) option zl6010*/ml option zl6010*/mj thermal resistance to air (free stream air velocity) 0 5 10 15 01234 air velocity (m/s) thermal resistance (k/w) option zl6010*/ml option zl6010*/mj
data sheet zl60101 tx / zl60102 rx 21 zarlink semiconductor inc. regulatory compliance eye safety the maximum optical output power is specified to comply with class 1m in accordance with iec 60825 ? 1:2001. in addition the transmitte r complies with fda performance standards for la ser products except fo r deviations pursuant to laser notice no.50, dated july 26, 2001. no main tenance or service of the product may be performed. electrostatic discharge the module is classified as class 1 (> 1000 volts) according to mil ? std ? 883, test method 30 15.7, with regards to the electrical pads. electrostatic discharge immunity the part withstand a 15 kv (air discharge) and 8 kv (conta ct discharge) either indirect or directly to receptacle; tested according to iec 61000 ? 4 ? 2, while in operation without addition of bit errors. electromagnetic interference emission the electromagnetic emission is tested in front of the module (module fitted with emi shield), with the module mounted in a frontplate cutout as defined in figure 15. the part is tested with fcc part 15, 30 ? 1000 mhz and 1 ghz to 5 th harmonic of the highest fundamental frequency (6.75 ghz), and is specified to be class b with > 6 db margin. immunity the electromagnetic immunity is tested without a front panel or enclosure. the module specification is maintained with an applied field of 10 v/m for frequencies between 10 khz and 10 ghz, according to iec 61000 ? 4 ? 3 and gr ? 1089 ? core. handling instructions cleaning the optical interface a protective connector plug is supplied with each module. th is plug should remain in place prior to use, and be re- attached whenever a fiber cable is not inserted. this will keep the optical interface free from dust or other contaminants, which may potentially degrade the optical signal. before reattaching the connector plug to the module, visually inspect the plug and remove any contam ination. if the optical interface becomes contaminated, it can be cleaned with high-pressure nitrogen. the use of fluids, or physical contact with the optical in terface, is not advised due to potential for damage. esd handling when handling the modules, precautions for esd sensit ive devices should be taken. these include use of esd protected work areas with wrist straps, controlled work-benches, floors etc.
zl60101 tx / zl60102 rx data sheet 22 zarlink semiconductor inc. link reach the following table lists the minimum reach distance of the 12 channel pluggable optical modules for different multi- mode fiber (mmf) types and bandwidths assuming worst case parameters. ea ch case allows for a maximum of 2 db per channel connection loss for patch cables and other connectors. link model parameters the link reaches above have been calculated using the following link model parameters and gigabit ethernet link model version 2.3.5 (filename: 5pmd047.xls). table 19 - link reach for different fiber types and data rates fiber type [core / cladding m] modal bandwidth @ 850 nm [mhz*km] reach distance @ 1 gbps [m] reach distance @ 2.5 gbps [m] reach distance @ 2.72 gbps [m] 62.5/125 mmf 200 350 130 110 62.5/125 or 50/125 mmf 400 650 260 220 50/125 mmf 500 750 300 270 table 20 - link model parameters parameter symbol value unit mode partition noise k-factor k 0.3 modal noise mn 0.3 db dispersion slope parameter s o 0.11 ps/nm 2 *km wavelength of zero dispersion u o 1320 nm attenuation coefficient at 850 nm db 3.5 db/km conversion factor c1 480 ns.mhz q-factor [ber 10 -12 ] q 7.04 tp4 eye opening 0.3 ui dcd allocation at tp3 dcd dj 0.08 ui rms baseline wander s.d. blw 0.025 rin coefficient k rin 0.70 conversion factor c_rx 329 ns.mhz
data sheet zl60101 tx / zl60102 rx 23 zarlink semiconductor inc. electrical interface - application examples figure 18 - recommended differential cml input interface figure 19 - recommended differential cml output interface z out =100 ? differential recommended cml output z 0 =100 ? differential z in =100 ? differential transmitter cml input 100nf 100nf host pcb receiver cml output z 0 =100 ? differential z term =100 ? differential recommended cml input 100nf 100nf host pcb z l
www.zarlink.com information relating to products and services furnished herein by zarlink semiconductor inc. trading as zarlink semiconductor o r its subsidiaries (collectively ?zarlink?) is believed to be reliable. however, zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual propert y rights owned by third parties which may result from such application or use. neither the supply of such information or purchase of product or service conveys any licen se, either express or implied, under patents or other intellectual property rights owned by zarlink or licensed from third parties by zarlink, whatsoever. purchaser s of products are also hereby notified that the use of product in certain ways or in combination with zarlink, or non-zarlink furnished goods or services may infringe patents or other intellectual property rights owned by zarlink. this publication is issued to provide information only and (unless agreed by zarlink in writing) may not be used, applied or re produced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. the products, t heir specifications, services and other information appearing in this publication are subject to change by zarlink without notice. no warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is the user?s responsibility t o fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not b een superseded. manufacturing does not necessarily include testing of all functions or parameters. these products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. all products and materials are sold and services provided subject to zarlink?s conditi ons of sale which are available on request. purchase of zarlink?s i 2 c components conveys a licence under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specification as defined by philips. zarlink and the zarlink semiconductor logo are trademarks of zarlink semiconductor inc. copyright 2002, zarlink semiconductor inc. all rights reserved. technical documentation - not for resale for more information about all zarlink products visit our web site at

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